Concurrent writes in multi-ported memories

Hi,

If you simultaneously write to the same address of a dual-ported memory from both ports, the output port value is unknown in read/write clock mode.

However, Altera 7014[/attach]https://www.alteraforum.com/forum/attachment.php?attachmentid=7015 ltera.com/literature/hb/stratix-v/stx5_51003.pdf"]embedded memory documentation (http://www.a[attach=) doesn't list any restrictions on the contents of the memory (at least I didn't see any in the documentation).

Interestingly enough, Xilinx does have such a restriction described in a Conflict Avoidance section of its embedded memory documentation (http://www.xilinx.com/support/documentation/user_guides/ug383.pdf) on page 15.

I'd assume there has to be such a restriction, unless Altera implemented some sophisticated mechanism to handle this case.

Thanks,

Evgeni