I also suggest you compile to the target device if you can before you spin the board. That way, you should have worked out any gotcha's like pin placement limitations, or other resource limitations you may not think about. (for example M9K blocks)
Often you may find designs that use many more M9K's than % memory bits utilized may indicate. So if you go just my number of bits available, you may fool yourself into thinking it will fit when it doesn't.
Also as you get into higher utilization, the tool has less flexibility in placement, due to congestion, so you may find you may not be able to meet timing for a design with high utilization vs a the same design in a part with lots of LE's available.
Pete