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Honored Contributor
Honored Contributorclocks on logic analyzer
I have a pll, a NCO block on my system. I am trying to verify the design on signaltap logic analyzer. The input to the pll, is the 50 MHz on-board oscillator. I used this on board oscillator as the a...
Altera_ForumHonored Contributor
Honored ContributorI know it is wrong because I used the time bars to measure the time difference and translated that to frequency. I divided the on-board 50 MHz by 10, so I am expecting 5 MHz. But I get some clock in the range of Hz. When you say how I expect signaltap to capture the clock correctly what do you mean? How does signaltap work?
