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Honored Contributor
Honored Contributorclocks on logic analyzer
I have a pll, a NCO block on my system. I am trying to verify the design on signaltap logic analyzer. The input to the pll, is the 50 MHz on-board oscillator. I used this on board oscillator as the a...
Altera_ForumHonored Contributor
Honored ContributorHow do you know its wrong? whats the expected frequency? unless it is less than 25Mhz how do you expect signal tap to capture the clock correctly. Even at 25MHz you are probably not going to get a decent reading.
