Forum Discussion

Zak's avatar
Zak
Icon for New Contributor rankNew Contributor
6 years ago

Clock Input voltage can be higher than VCCIO on Cyclone V devices?

Hello everyone, I need to connect one 1.8V CMOS clock generator to a clock input pin of the IO bank I use for DDR3L (1.35V). Since VCCPD=2.5V and VCCIO=1.35V on that bank, I'm not sure I can connec...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Andrea,

The limitation that you mentioned is meant for the IO buffer. If exceed that value, the IO buffer will be damaged.

So for the usage of 1.8V LVCMOS input on IO bank with VCCIO=1.35V, is not allowable in datasheet and we didnt test it before. So we cannot make any statement on that.

Thank You.