Chip-to-Chip AXI for Altera

Hi,

With Xilinx FPGAs, there's a an IP to do Chip-to-Chip (FPGA-to-FPGA) ARM AXI bus conncetion (either through LVDS IO or Transceiver):

http://www.xilinx.com/support/documentation/ip_documentation/ds803_axi2axi_connector.pdf

Is there a similar IP available (or an application note) for Stratix IV devices ?

Thank!