Change Bar's size in PCIe Simulation

Thanks for reply!!

I've followed your advice and it works!!...... thank a lot!!

Well, I've got you another questions about your method.

1.- When you issue a PCIe's TLP you catch the data in RxmWriteData ???

I ask you this because I'm trying to simulate a PCIe communication using Qsys' Test bench make me.

There is a file where I can set a PCIe's TLP and issue it to my endpoint.

Inside of that file the test bench issue a TLP to write a memory and next read that memory.

I've issued next data 11111110000000000000000000000011

I should watched in RxmWriteData my data, but I can't watch it (I watch another datas).

But when I read data from my memory I can watch it (I watch it in RXMReadData). Futhermore, my test bench tells me by Modelsim's console "Target Write and Read compared okay", So I think that I've issued my data correctly, but I don't know why RxmWriteData doesn't show my data.