CDR reference clock

Hi Shubhangi,

It's required to be used if your design require the reference clock input to the RX clock data recovery.

For your information, clock data recovery (CDR) block need an input reference clock source to generate the clocks required for transceiver operation. The input reference clock must be stable and free-running at device power-up for proper PLL calibrations.

To perform the optimum performance of GT channel, the reference clock is recommended to be from a dedicated reference clock pin in the same bank. For details information about the input reference clock, you may refer to link below, Section 3.2, pg383, https://www.intel.com/content/www/us/en/docs/programmable/683617/21-1/input-reference-clock-sources.html

For further information about non-bonded configuration, you may refer to link below, Section 3.11, pg411, https://www.intel.com/content/www/us/en/docs/programmable/683617/21-1/non-bonded-configurations.html

Best regards,

Zi Ying