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avib's avatar
avib
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Cannot program QSPI memory through ASMI Parallel II IP

Hello, We have a design that connects Avalon-MM Cyclone V Hard IP for PCIe Intel FPGA IP to ASMI Parallel II IP. The Cyclone V is connected to a QSPI serial Flash memory MT25QL512ABB8ESF (512Mb) ...
  • avib's avatar
    avib
    3 years ago

    Hi,

    We have a FIX!

    We replaced the ASMI II IP with Intel FPGA Generic QUAD SPI Controller II Core, which also supports our specific Flash device, and succeeded to write to the Flash memory.

    Thanks

    Avi

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


If you want to be able to access the quad SPI flash that is used to configure the image for the FPGA after the configuration is complete, you can instantiate the alt serial flash module that will allow you to access the FPGA pins connected to the SPI device. I use this block to allow my SPI flash config memory to be accessible via the JTAG chain, but it has capabilities beyond just this function.


You may refer the user guide below

https://www.intel.com/content/www/us/en/docs/programmable/683299/current/using-the-fpga-serial-flash-loader-ip-85096.html


You want to look at the 'Share ASMI interface in your design' option description.


Regards,

Wincent_Intel


  • avib's avatar
    avib
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi Wincent,

    First, thank you for your reply!

    If we are able to read QSPI memory data content, to erase the Flash, and to RD/WR to/from its status register using the ASMI II registers, isn't it means that the ASMI II IP has granted control on the SPI pins?

    Thank you

    Avi