Cannot program QSPI memory through ASMI Parallel II IP
Hello,
We have a design that connects Avalon-MM Cyclone V Hard IP for PCIe Intel FPGA IP to ASMI Parallel II IP.
The Cyclone V is connected to a QSPI serial Flash memory MT25QL512ABB8ESF (512Mb)
Note that due to the 50MHz maximum clock frequency limitation of the ASMI II IP, we used an Avalon-MM Clock Crossing Bridge between the Avalon-MM Cyclone V Hard IP for PCIe and the ASMI II IP. The PCIe IP works at 125M, and the ASMI II works at 50MHz.
We are able to modify the CSR at address 0x04010000 – 0x040100FF (e.g, perform WR_ENABLE, erase Flash sectors, and more), We are also able to read the Flash memory content.
But we cannot program the Flash data at Addresses 0x00000000 – 0x03FFFFFF.
From the ASMI Parallel II Intel® FPGA IP user guide we understand that, since there are no in-direct registers for address and data like was in the old ASMI IP, in this case in order to modify the Flash memory we should perform direct address-data write transactions, and the ASMI II IP will do the NOR programming sequence . But, as I wrote, it is not working.
Hi,
We have a FIX!
We replaced the ASMI II IP with Intel FPGA Generic QUAD SPI Controller II Core, which also supports our specific Flash device, and succeeded to write to the Flash memory.
Thanks
Avi