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DAndr6's avatar
DAndr6
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7 years ago

Cannot configure stratix 10 device with provided bitstreams

The Board Test System (BTS) is able to detect the Stratix 10 FPGA. When we set the the load selector switch (SW3.3) to ON and connect the board to the internet, the factory default design seems to ...
DAndr6's avatar
DAndr6
Icon for New Contributor rankNew Contributor
7 years ago

Hi Nooraini,

Once we set MSL pins to JTAG mode only (SW1 to 11 based on user guide), we are able to configure the Stratix 10 device using the provided bitstreams.

It works under all three frequencies, i.e., 24MHz, 16 MHz, and 6 MHz.

If we disable the MAX V, we are able to configure the FPGA using the Quartus Programmer. If we enable the MAX V, we are able to configure the FPGA using both the Quartus Programmer and Board Test System.

Thanks for your help.

One more thing, if we insert the card to the PCIe port inside a computer, how to set SW1 to configure the FPGA properly? Do we need to change the setting of other DIP switches in the PCIe mode?

Regards,

Miaoqing on behalf of David