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DAndr6's avatar
DAndr6
Icon for New Contributor rankNew Contributor
7 years ago

Cannot configure stratix 10 device with provided bitstreams

The Board Test System (BTS) is able to detect the Stratix 10 FPGA. When we set the the load selector switch (SW3.3) to ON and connect the board to the internet, the factory default design seems to ...
Nooraini_Y_Intel's avatar
Nooraini_Y_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi DAndr6,

Were you able to use the Qaurtus programmer to auto-detect the devices (S10 + MAX V) on the Stratix 10 dev kit? Which connector port on the Stratix 10 dev kit that you are using with the USB Blaster II? Please provide screen shot showing the auto-detect result. Can you provide screen shots on the Quartus programmer when trying to program the .sof file with the error message? Which Stratix 10 GX dev kit are you using? Is it the ES-L tile or ES-H tile or the Production-L tile board? You can only use the .sof file that matches with the board respectively.

https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-s10-fpga.html

Regards,

Nooraini