Cannot access the JTAG port of Arria10 SoC
There’re two Arria 10 SoCs in my design,
the follwoing picture indicates the JTAG chain on board. Chip A and Chip B
share the same TCK & TMS. TCK is pulled down to GND and TMS is pulled up to
VCCPGM(1.8V), according to the pin guidelines. TDO of Chip A connects to TDI of
Chip B. TDI of Chip A is pulled up to VCCPGM(1.8V).
After power up, programmer in quartus
cannot scan the JTAG chain, and reminds me the following errors when I run
“Test JTAG chain”:
!Error: JTAG chain problem detected
!Error: TDI connection to the first
detected device UNKNOWN_FE000001 might be shorted to GND
!Error: The TCK and TMS connections to the
device before the first detected device UNKNOWN_FE000001 might have a problem
!Info: Detected 3 device(s)
!Info: Device 1: UNKNOWN_FE000001
!Info: Device 2: UNKNOWN_F2000001
!Info: Device 3: UNKNOWN_F2000001
Also, the following error pops out when I
try “JTAG Chain Debugging”:
!Error: Incorrect clock value
The impedance between JTAG TDI and GND is
1.029KΩ.
The impedance between the output of
VCCPGM(1.8V) regulator and GND is 24Ω.
Is the Arria 10 SoC JTAG port permanently
damaged?
What can I do to access the JTAG chain?
Thanks, regards.