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Altera_Forum
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15 years ago

Can we use a differential clock input as 2 single-ended clock inputs?

I use a FPGA of the Stratix GX II family, EP2SGX90FF1508. In my design I have 3 differential input clocks on an external connector but I actually need 5 single ended clock inputs. Is it possibl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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Is it possible to use a differential input as 2 single-ended inputs?

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Yes.

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Do we need to configure something on Quartus for that?

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Assign a single ended I/O standard and the respective pin location for the clock signals.