Can lowering frequency cause design to not run

Hold requirements are usually 0ns, meaning the same edge that launches data is the one that would latch a violation. Since only one edge of a clock is used for analysis(and failure), it doesn't matter what the frequency is. So if a design has a hold failure(and the requirement is 0, which it is for 99% of the paths in a design), then it will still fail at lower frequencies, even if you lowered it down to the hertz range.