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KL000's avatar
KL000
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7 years ago

Can I use 10M08 to Remote System Upgrade over UART with the Nios II Processor?

I would like to use the 10M08 version of MAX10 for RSU over UART with the Nios II Processor. I am wondering if this is doable? Our custom board currently has the 10M08SAU connected to eeprom. We are redesigning and can add an external QSPI flash to store the software state machine. I am trying to follow the AN741 document but the steps are for 10M50 device. I also have a 10M08 Evaluation Kit board I can play with. Can utilize any of these boards to test RSU over UART?

Ideally we would want our customers to be able to program the 10M08 with any updates without the USB Blaster as they would not have access to one. I came upon the RSU over UART and it seems perfect for our application. If this isn't possible, can anyone suggest any other alternatives? Thank you in advance!

5 Replies

  • KL000's avatar
    KL000
    Icon for New Contributor rankNew Contributor
    7 years ago

    Hi Anand,

    Thank you for the response. It says program the QSPI with the pfl.sof, but that file is specifically for 10M50. How do I go about generating it for the 10M08? Is there a project that I can modify to use the 10M08.

    Also another question is how big is the bitstream that is stored in the QSPI. I noticed on the 10M50 board uses N25Q512A83GSF40FTR-ND which is 512Mb. I am trying to reduce cost and would like to use less memory if possible. QSPI would be solely for initializing/booting Nios II.

    I am also debating between using 10M08 or 10M02. My FPGA design is relatively small ~110 LUTs. Is RSU supported in the 10M02. I am just worried it doesn't have enough logic elements to support it.

    Thank you for your help!

    • AnandRaj_S_Intel's avatar
      AnandRaj_S_Intel
      Icon for Regular Contributor rankRegular Contributor
      7 years ago

      Hi,

      1. You can generate a pfl.sof for required device. Use qsys/platform designer to instantiate PFL ip *(pin assignments not required) compile the design which generate an .sof.
      2. Regarding Memory,It depends on your design. you can check it by user self by designing complete design in quartus with required hex and pof generation.

      If your design fits with resources you are good to go with device selected else based on resources requirement select new device.

      Regards

      Anand

  • KL000's avatar
    KL000
    Icon for New Contributor rankNew Contributor
    7 years ago

    Thank you for the response Anand. I am trying to get the remote_update.c file to fit the 10M08 onchip memory. It says

    Info: Linking nios2_rsu_sw.elf

    nios2-elf-g++ -T'../hal_bsp//linker.x' -msys-crt0='../hal_bsp//obj/HAL/src/crt0.o' -msys-lib=hal_bsp -L../hal_bsp/ -Wl,-Map=nios2_rsu_sw.map -O1 -g -Wall -mno-hw-div -mno-hw-mul -mno-hw-mulx -mgpopt=global -o nios2_rsu_sw.elf obj/default/hello_world_small.o -lm -msys-lib=m

    c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/bin/ld.exe: nios2_rsu_sw.elf section `.text' will not fit in region `onchip_memory2_0'

    c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/bin/ld.exe: region `onchip_memory2_0' overflowed by 39528 bytes

    Is there a modified remote_update.c that can fit the 10M08 chip? I got the file from the rsu reference project for 10M50. Would I need to modify the remote_update.c and optimize it for 10M08 chip since 10M08 only has 378 Kb of M9K memory whereas 10M50 has 1638 Kb.

    • AnandRaj_S_Intel's avatar
      AnandRaj_S_Intel
      Icon for Regular Contributor rankRegular Contributor
      7 years ago

      ​Hi,

      Use external memory in you design instead of onchip ram.

      Look into AN 730 Nios II Processor Booting Methods in MAX 10 FPGA Devices.

      Regards

      Anand