Can I make stand-alone NiosII system?

Hi,thanks your res.

Hm...

When performing NiosII, must a USB cable always be connected?

And, every time I put the power supply into the board, do I have to let QuartusII-Programmer to program the board?

Configuration is volatile and FPGAs lose it whenever you turn power off.

If you don't want to load configuration every time with USB programmer (and usually you can't do it when the system has been deployed on the field) you need a non-volatile memory connected to fpga. This can be a serial or parallel flash memory.

The common solution is using epcs serial flash devices supplied by Altera itself.

hi

yes you can make stand alone nios2 system........but you need do add a flash memory or a epcs in your system. you need set the reset vector and exception vector at sopc to cpu starts in your flash memmory..

good luck

Franz Wagner

Hi, thanks all.

I'll try to read "Configuration and Remote System Upgrades" chapter in the FPGA handbook.

I try to program with DE2-115 board.

flash memory are on the board, so I'll try it.

I am sorry that I did not reply to you sooner.

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If your software is small enough you can also pre-initialize on-chip memory to hold the software contents so that you don't need to copy it out of flash. You would still need to program the FPGA but the Nios II software contents would be part of it so that Nios II starts running as soon as the FPGA is configured.

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Well, I can't image that "Nios II software contents would be part of it".

Hmmm..

I don't know how to do it.

Although I am reading Nios II Flash Programmer User Guide now, do you know the document which is consulted more?

For flash programming that would be the best document to read. It might point you at other documents as well.

This is what I mean about baking the software right into the .sof file:

1) Generate your system in SOPC Builder/Qsys, make sure a large on-chip memory is present and it is configured to be pre-initialized.

2) Create and compile your software, ensure that a .hex file is created for the on-chip memory

3) Compile your hardware design in Quartus

The hex file created in# 2 becomes part of the hardware image in step# 3. So when the .sof generated in step# 3 you now have a hardware image that contains both the hardware design and software contents pre-initialized in the on-chip RAM. This is only feasible if your software is fairly small since on-chip memory is a limited resource in FPGAs.

Thanks, BadOmen.

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For flash programming that would be the best document to read. It might point you at other documents as well.

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I finished reading thah briefly.

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This is what I mean about baking the software right into the .sof file:

1) Generate your system in SOPC Builder/Qsys, make sure a large on-chip memory is present and it is configured to be pre-initialized.

2) Create and compile your software, ensure that a .hex file is created for the on-chip memory

3) Compile your hardware design in Quartus

The hex file created in# 2 becomes part of the hardware image in step# 3. So when the .sof generated in step# 3 you now have a hardware image that contains both the hardware design and software contents pre-initialized in the on-chip RAM. This is only feasible if your software is fairly small since on-chip memory is a limited resource in FPGAs.

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Although I tried many things, the following errors come out and Flash-Programmer is not completed.

*Connected system ID hash not found on target at expeted not found on target at expected base address.

*Connected system timestamp not found on target at expected base address.

But my Nios II project run as "Run as" mode.

I don't know how to solve that errors.

Do you know any idea?

good morning

this happens because the system id peripheral at your sopc builder......

open your sopc builder and look at this peripheral ...... has a system id and time stamp......

i dont like to use this peripheral ......you can only remove this and re-generate sopc and recompile your project and works........

cheers

Franz Wagner