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fgfasfafgfdhagdszfea's avatar
fgfasfafgfdhagdszfea
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4 years ago
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Can I apply REFCLK to the FPGA while powered down?

I have a situation where it is possible that the PCIe system could be powered-up while the board with the FPGA could be completely powered-down. The board with the FPGA doesn't share any of the power...
  • skbeh's avatar
    skbeh
    4 years ago

    Hi

    Based on PCIe specification, REFCLK usually comes from rootport CPU via pcie edge connector, users have no control on the CPU side to turn-on/turn-off the REFCLK supply, this is a common scenario, it is okay to continue apply the REFCLK to the FPGA when it is completely unpowered. Similar to the Rx pins, it can be drive while unpowered.


skbeh's avatar
skbeh
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4 years ago

Functionally it’s a don’t care – even if the FPGA gets the refclk, the PCIe will eventually give up because either it won’t detect a link partner or not get trained.

I didn't see this information is documented, documentations mostly describe about how the pcie core works, oppose to this un-driven scenario.

  • fgfasfafgfdhagdszfea's avatar
    fgfasfafgfdhagdszfea
    Icon for New Contributor rankNew Contributor
    4 years ago

    I'm less worried from a software standpoint, and more worried from a hardware standpoint, whether the absolute maximum voltage or current ratings could be exceeded if the FPGA was driven unpowered. Causing physical damage to the FPGA.