Can HPS verify FPGA configuration?

You can achieve to a certain extent some verification.

Firstly the HPS can verify whether or not the FPGA is configured via control signals in the HPS bridge. The preloaders frequently use this to determine the state of the FPGA during boot.

I don't believe there is a way for the HPS to directly determine if the correct file was configured - it can determine it was correctly configured, but not what file was used. In some ways it is possible to assist in checking by adding to each design a system ID block which is unique to the design (including timestamp so version can be checked). The preloader can then check the system id and timestamp through the HPS bridge. If it finds the right values, it knows the right design is loaded.

In terms of JTAG programming, the Quartus programmer will only show successful operation if the operation is successful. CRC verification is performed on each block of the image file, and it can verify that the contents of the SRAM in the FPGA matches what it uploaded (the "Verification" step). In fact the JTAG programmer can also "read back the full configuration of the FPGA" quite happily - the "Examine" step. I don't believe the HPS can though.

Another option you have is to store the FPGA image on the boot media with the HPS software. The FPGA can be programmed by the HPS - so if the HPS has the image it wants to upload to the FPGA, it can check the image is correct before uploading it. Once it finds the image file is correct, it will upload it and because of CRC checks the FPGA will be able to tell it that configuration was successful (indicating the file was programmed correctly).