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Altera_Forum's avatar
Altera_Forum
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14 years ago

CameraLink connectivity issues with a dev kit

I am trying to connect a Dalsa grayscale video camera to a DE2-115 board using CameraLink base mode connectivity. I am using the CLR-HSMC receiver card to achieve that:

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=68&no=588&partno=2 (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=68&no=588&partno=2)

My aim is just to be able to display on a VGA monitor for now. Terasic provides a demo code using a different color camera which outputs 10-bit data and is connected to a DE2-115 via the CLR-HSMC and then displays to VGA.

I am trying to modify this code to satisfy my requirements but I am stuck on a few things. From the block diagram shown on the Terasic webpage, the LVDS (DS90CR288A ) Receiver acts as a deserializer and converts the four LVDS data streams into 28 bits of LVCMOS data. Then the author of the code 'builds' the 10-bit camera output by using the following code, where CLRRX_BASE is the 28-bit data: 


assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE;   
assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE; 
assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE;  
assign	CLR_BASE_D	=	CLRRX_BASE;

My question is: How do I know which bit of the 28 bits must be used to 'build' the 10-bit camera output? For example, why is CLR_BASE_D[5] = CLRRX_BASE[6] and not [5]?

If my camera is also outputting a 10-bit data, can I just use that same bit order? Now suppose my camera outputs only 8-bit data, do I just use bits 0,1,2,3,4,6,27,5 with the last bit 5 being the MSB?

I'd be very grateful if somebody with experience using cameras and CameraLink (or that CLR-HSMC card) could give me some advice on this.

PS: I can upload the full demo code if that's easier to understand.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    The 10 bit camera output is correctly defined by CLR_BASE_D[9:0]. The strange pairing of bits with the CameraLink Receiver chip are an artifact of the CameraLink specification (not the strangest thing in that specification either). Yes, for an 8 bit camera use bits 0,1,2,3,4,6,27,5 with the last bit 5 being the MSB.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Thank you gj_leeson. Could you please direct me to any documentation that has this pairing info for the full 28 bits? I have found that bits 24-26 are for the LVAL, FVAL and DVAL but what if the camera data is 12-bit output for example... which bit do I assign? I have searched online but I can't get the right thing.

    OK, so for now I will just use the bit-pairing as is, and try to move on with my task. My camera is a Linescan grayscale camera outputting 1024 10-bit pixels for each line and at a line rate of 5kHz. I want to buffer a few lines (e.g. 600) and display on a standard monitor.

    So, after CLRRX_BASE is assigned, I need to capture the required valid data and then use the on board SDRam to read and write and acts as a buffer before going onto a 800x600 resolution display or even a 1024x600 as I have 1024 pixels per line already.

    For the first step of capturing the camera data, I thought something like the following module would do. 

    
module LineScan_Capture  
        (
            iRST_n,                
            iCLK,            
            
            iDATA,            
            iLVAL,
            iDVAL,
            
            oDATA                
    );
    
input         iRST_n;                
input         iCLK; //clock of camera
input     iDATA;
input            iLVAL;
input            iDVAL;
output     oDATA;
reg  line_ccd_data;
always@(posedge iCLK or negedge iRST_n)
begin
    if(!iRST_n)
        line_ccd_data    <=    0;
    else if ({iLVAL,iDVAL}==2'b11)
        line_ccd_data    <=    iDATA;
    
end    
assign oDATA    = line_ccd_data;
endmodule
    Is the code correct?

    Now to do the buffering, I am not too sure how to do that. The demo code has used the FIFO megafunctions to read and write to the SDRAM. I'm trying to understand and modify them for my need to accumulate line data at the moment. Any advice on how to tackle that? I'll probably post a new query soon after I try a few times and fail :)