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Altera_Forum
Honored Contributor
17 years agoYou might be able to modify the HDL to enable synthesis to infer the RAM. See "Inferring Memory Functions from HDL Code" in the Quartus handbook, Volume 1, Section II, Chapter 6, "Recommended HDL Coding Styles". If you want to use features of the RAM block that synthesis does not support for inferred RAM, then you need to instantiate an altsyncram MegaWizard variation as OrchestraDirector suggested.