Altera_ForumHonored Contributor15 years agoBoard design with ep3c25q240 and ddr1 sdram I'm trying to "Porting" cycloneIII starter kit with ep3c25q240 to avoid BGA package to cost down our product,but there's some problem on ddr interface usage if i want to use ddr controller IP t...Show More
Recent DiscussionsCyclone-V SCFIFO - adding ECC to M10K/MLAB/Auto memoryWill serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?System PLL of Agliex5 PCIE example design cannot be locked after configurationJTAG Chain Broken on Agilex 7-I Dev KitRequest for Cyclone V Pinout File Information