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Honored ContributorBlackjack using VHDL code
My partner and I have an assignment to replicate a blackjack game using VHDL coding techniques on Quartus Max+II. We were to do this by using a Finite State Machine. We are having trouble unde...
Altera_ForumHonored Contributor
Honored ContributorTricky:
I find it easier (especially for students) if both state transitions and outputs are kept together inside the processes. It will also generate muxes, with the advantage that they will be registered. But yes, I am aware you can do state transitions inside a clocked process, and outputs in a combinatorial process or in a concurrent statement (basically outside of a clocked process). I just recommended the other style due to my experience as a VHDL lab assistant at the University.
