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Altera_Forum
Honored Contributor
16 years agoBlackjack using VHDL code
My partner and I have an assignment to replicate a blackjack game using VHDL coding techniques on Quartus Max+II. We were to do this by using a Finite State Machine. We are having trouble unde...
Altera_Forum
Honored Contributor
16 years agoTypically a process gets executed once every clock cycle.
And a process can have case statements inside it. That's how you typically implement FSM's. So you basically need one or more processes with case statements inside them. You can have the when statements outside of a process, (concurent statements) but I do not recommend it.