Bidirectional SPI switch?

I can't make it happen. Have a look at the attachment for the results.

Basically, it should just be a mechanical switch i.e.

when en = 0, wire A should be connected to wire C.

when en = 1, wire B should be connected to wire C.

-- The idea is that choose either A or B is exclusively
-- connected to C
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity bidir_SPI_switch is
    port(
        A_SCLK, B_SCLK, C_SCLK        :    INOUT STD_LOGIC;
        en, S    : IN BIT
    );
            
end bidir_SPI_switch;
architecture behaviour of bidir_SPI_switch is
begin
    process(en,S)
    begin
-- MASTER enable
        if en = '0' then
            A_SCLK <= C_SCLK;
            B_SCLK <= 'Z';
            C_SCLK <= A_SCLK;
        else
-- SELECT either A or B
            A_SCLK <= 'Z';
            C_SCLK <= B_SCLK;
            B_SCLK <= C_SCLK;
        end if;
    end process;
end architecture behaviour;

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Some points of the original post seems confused. SPI implies either master or slave role, for this reason none of the standard SPI signals would be bidirectional respectively inoout normally. It's of course possible to design an SPI interface that changes between master and slave role, but you didn't mention this.

It's also wrong to say that a VHDL assignment involves registers. This is only the case, if it executes under a edge sensitive event condition. You can have combinational process statements as well, they infer multiplexers, as apparently intended here.

--- Quote End ---

Apologies for the confusion. What I intend to do is have 3 SPI ports where any of the nodes connected could either be a master or slave. it is a truly bidirectional system then.

Some points of the original post seems confused. SPI implies either master or slave role, for this reason none of the standard SPI signals would be bidirectional respectively inoout normally. It's of course possible to design an SPI interface that changes between master and slave role, but you didn't mention this.

It's also wrong to say that a VHDL assignment involves registers. This is only the case, if it executes under a edge sensitive event condition. You can have combinational process statements as well, they infer multiplexers, as apparently intended here.

If I have understood you, you have A,B,C SPI interfaces and you want C to talk to either A or B:

(1) C to A or B

Since you have chipselect then you can drive both at same time then use chipselect.

(2) A or B to C: use your switch to drive C

This pseudocode may explain my idea:

if OE = ?
    A <= C;
    B <= C;
    C <= 'Z';
else 
    A <= 'Z';
    B <= 'Z';
    if select = ?
        C <= A;
    else
        C <= B;
    end if;
end if;