Some points of the original post seems confused. SPI implies either master or slave role, for this reason none of the standard SPI signals would be bidirectional respectively inoout normally. It's of course possible to design an SPI interface that changes between master and slave role, but you didn't mention this.
It's also wrong to say that a VHDL assignment involves registers. This is only the case, if it executes under a edge sensitive event condition. You can have combinational process statements as well, they infer multiplexers, as apparently intended here.