bidirectional buffer implementation

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a "buffer" in VHDL isnt really anything more than a register, not a bidirectional IO pin.

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You can specify a pin as either in, out, inout, or buffer. Both inout and buffer are bidirectionals, but buffer offers the option of writing and reading to the same pin at the same time.

Buffers (in the sense of amplifiers/drivers) is usually automatically generated by the synthesis tool, and I'm not sure if VHDL has an explicit way of specifying a buffer. What I'd do to create buffers within my logic is just assigning signals, simply like this (below is just an example of connecting 2 buffers together - sorry, i did not test this out, but this should work):

signal s:std_logic_vector(1 downto 0):=(others=>'Z');
attribute keep of s:signal is true;           -- this is so that synthesis tools don't optimize away buffers.
s(1)<=s(0);