bidirectional buffer implementation

i'm not too sure what is meant by "direction control", but what i know is you can implement bidirectional buffers that can drive a line HIGH/LOW, or release the line (i.e. drive the line to tri-state) for a read to take place, and you don't need to specify at which time the pin becomes an input or an input.

In VHDL at least (probably applies to other HDLs too), you can use an inout and drive the pin at any clock cycle, but of course before you read from the inout pin, you must first release the line (or tri-state the pin), by assigning the pin to 'Z'. Then, at the next clock cycle, you can read the value from the pin (the pin should be now driven from an external device).

Another way is to use "buffer" in VHDL. Here, you can both read and write to the same pin within the same clock cycle. This is useful when you need a feedback path of the pin back into the FPGA.

Hope this helps.