Behaviour of MAX without VCCIO supply?

During a structural test of a board with a MAX10 FPGA (manufacturing test, only one time performed), I need to shut-down a DC/DC of the board during about 10 seconds. As a consequence, the core of MAX10 FPGA will be supplied nominally when the all VCCIO not. Is this configuration acceptable for the MAX10? Is there a risk in that situation?

Note : During the test, it is not request that the FPGA is operational.

Thanks,

Denis.