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Altera_Forum
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11 years ago

Beginner device CPLD/FPGA selection for anti-aliasing filter

Hi all, I am working on a HW design for power analysis of 8channel 50/60Hz signals that are sampled @ around 50kHz / channel. These signals needs to be filtered after sampling before transforma...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Dear Dave and FvM.

Thank you for all your feedback!

This is a new board and I am only at investigation stage trying to identify rough BOM cost for

different solutions, which is not easy when I do not have the knowledge required.

The MCU does not have available performance to do this filtering, so I am trying to compare

adding another MCU or a FPGA for the job (or other smarter solutions if any)

I will look into the audio ADC suggestion, I fear though it will be a bit costly due to the 8 channels.

Many Thanks!

/Will_I_Am