Honored Contributor
Honored ContributorI entered your filter requirements into MATLAB's FDAtool and with the settings shown in the GUI you need about 50 coefficients.
https://www.alteraforum.com/forum/attachment.php?attachmentid=8659 Since you are sampling at 50kHz, and your FPGA/CPLD can run at least at 50MHz to 100MHz, you have at least 1000 FPGA clocks per ADC clock. This means that your filter can easily be implemented using a single multiplier and some RAM. CPLDs do not have these types of resources, so a small FPGA would be more appropriate. A CPLD could probably do it too, but FPGAs are nicer to deal with when doing signal processing, as you have RAM and can use the SignalTap II logic analyzer. --- Quote Start --- For now only the filtering needs to be done, transformation etc is done later by an MCU --- Quote End --- What transformation? If you are only interested in the 50/60Hz signal, then there is a transform called the Goertzel algorithm http://en.wikipedia.org/wiki/goertzel_algorithm that can be used essentially as the FFT but of just one channel. Cheers, Dave
