Forum Discussion
Altera_Forum
Honored Contributor
16 years agoif you can check your image via jtag and it runs as expected, then the source should be epcs & fpga connetion related.
could you verify that the MSEL pins are setup for AS mode ? when powering up the system, do you see the fpga request at the epcs pins ? you should see the DCLK and other signals... if this happens, do you see changes at the output of your epcs device that it is responding ?