backspace and enter key, reset VGA in verilog HDL?

module top_vga_display_controller(clk, reset, w_enable, ascii_in, h_sync, v_sync, rgb);

input clk, reset, w_enable;

input wire [6:0] ascii_in;

output h_sync, v_sync;

output wire [2:0] rgb;

// signal declaration

wire [9:0] pixel_x, pixel_y;

wire video_on, pixel_tick; ///

reg [2:0] rgb_reg;

wire [2:0] rgb_next; ////

// body

// instantiate vga_sync circuit

vga_sync vga_syncronization_block_unit

(.clk(clk),

.reset(reset),

.h_sync(h_sync),

.v_sync(v_sync),

.video_on(video_on),

.p_tick(pixel_tick),

.pixel_x(pixel_x),

.pixel_y(pixel_y));

// font generation circuit

text_pixel_generation_circuit text_pixel_generation_block_unit

(.clk(clk),

.reset(reset),

.text_on(video_on),

.w_enable(w_enable),

.ascii_in(ascii_in),

.pixel_x(pixel_x),

.pixel_y(pixel_y),

.text_rgb(rgb_next));

// rgb buffer

always @(posedge clk)

if (pixel_tick)

rgb_reg <= rgb_next;

assign rgb = rgb_reg;

endmodule