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Honored Contributor
Honored Contributorbackspace and enter key, reset VGA in verilog HDL?
how to write codes for backspace and enter key in Verilog HDL? and also how to reset VGA screen? here's the sample code i cant figure out what is wrong. thanks! module vga_sync...
Altera_ForumHonored Contributor
Honored ContributorThere is one typical syntax mistake commonly done.
assign h_end = (h_count_reg == (HD+HF+HB+HR-1)); You use == what is a logical equality its result can be unknown, you should better use === what is case equality and will only result in true or false assign h_end = (h_count_reg === (HD+HF+HB+HR-1)); Next thing. inside an always construct, you better use the non blocking assignment <= instead of the single =. Your code shows only the the video synchronisation signals, but no video information itself. No RGB signal shown, i assume this must be done somewhere else where the video_on signal is use ...
