Avalon MM Master Template - Writing makes Nios2 crash

Hi,

I've implemented a Avalon Master MM master template to manually write a SDRAM (which is shared with my Nios processor). The source code is the following:

-- From component
writer_control_fixed_location  => '0',  -- writer_control.fixed_location
writer_control_write_base      => writer_address_base,     
writer_control_write_length    => std_logic_vector(to_unsigned(4, 32)),    
writer_control_go              => writer_go,        
writer_control_done            => writer_done,         
writer_user_write_buffer       => writer_write_buffer,       
writer_user_buffer_input_data  => writer_buffer_data, 
writer_user_buffer_full        => writer_buffer_full,     
--Writing process
writer:process(CLOCK_50)
begin
    if rising_edge(CLOCK_50) then
         if SW(1) = '0' then
            case transmit_state is
            when write_buffer =>
               if writer_buffer_full = '0' then
                   writer_write_buffer <= '1';
                   writer_go <= '1';
                    transmit_state <= writing_done;
               end if;
                    
            when writing_done =>
              writer_write_buffer <= '0';
              writer_go <= '0';
              if writer_done = '1' then
                  transmit_state <= writing_idle;
              end if;
                    
            when writing_idle =>
                null;
            end case;
         else
            transmit_state <= write_buffer;
                
            writer_write_buffer <= '0';
            writer_go <= '0';
                
            writer_address_base <= STD_LOGIC_VECTOR(to_unsigned(100 , 32));
            writer_buffer_data <= STD_LOGIC_VECTOR(to_unsigned(258076532 , 32));
         end if;
     end if;
end process writer;

I use a switch to perform one write at a time at a defined address. My first doubt is that the signal "writer_done" is never asserted.

Nevertheless, I can read the correct value at the written address (100) using my Nios program.

But when I'm trying to loop write (in the VHDL) and read values using my Nios program, it keeps on crashing and I can't figure out why. I'm assuming that trying to perform a nios read access while writing in the SDRAM put me in this situation but I don't know how to protect this situation from occuring.

Can you please help me ?

Thanks,

Nemesys