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Oliver_I_Sedlacek's avatar
Oliver_I_Sedlacek
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3 years ago

Autostart NIOS from external SDRAM problem

So my NIOS code has outgrown the available on chip RAM and I've moved it to off chip SDRAM. Very slow, but I fire up Eclipse and I can get it to run. I need to get it to run automatically and I've fo...
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EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


From the doc, there is a image on the "Hardware Design" shows the Platform Designer and the connections made of each IP. You can handpicked the IPs shown and connect them accordingly, which will get you the hardware design example.


Then follow the steps for the "Nios® II Processor Application Copied from EPCQ Flash to RAM Using Boot Copier" section.


I guess the first issue is to get the epcq controller to be your reset vector.


Then, back to your original issue, to try this example and build it up until the .jic programming file and program it to your board and tests.


With the .jic you can do a reset on your FPGA device using the reset button or power cycle.


Oliver_I_Sedlacek's avatar
Oliver_I_Sedlacek
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3 years ago

Just to re-iterate, I got the EPQC reset option sorted when I used the Flash controller V2. Same symptoms though, the FPGA configures but the NIOS2 doesn't run and now I can't connect with the debugger. Going round the loop described in the handbook a dozen times and getting the same results isn't helping me debug my problem.