Atom X is connected on its PADTOINPUTREGISTERDELAYSETTING port but atom Y is not.

Hi all, first time poster here.

I'm not an Altera guru, by any means, but I've been able to muddle through with the help of Google and co-workers. This error has me baffled, though.

I am trying to include a DRR3 phy created by the mega-wizard plugin manager in our design, and I get the following error:

Error: Atom "...|ddr3_phy_alt_mem_phy_dq_io:dqs_group.dq.dq_pad|ddr_io_config_gen.dq_io_config" is connected on its PADTOINPUTREGISTERDELAYSETTING port but atom "...|ddr3_phy_alt_mem_phy_dm:dqs_group.dm_gen.dm_pad_gen.dm_pad|dq_io_config" is not connected.  Both must be connected or both must be disconnected

Now, I've looked in the verilog (alt_mem_phy.v) created by the plug-in manager, and I've found the ports that it's complaining about:

    begin : ddr_io_config_gen
        // IO_CONFIG - num_dq 0->16
        stratixiii_io_config dq_io_config(
            .datain                        (scan_din),          // shared per DQS group
            .clk                           (sc_clk),
            .ena                           (scan_enable),
            .update                        (scan_update),       // shared per DQS group
            // synopsys translate_off
            .devclrn(), .devpor(),
            .dutycycledelaymode(),
            .dutycycledelaysettings(),
            .outputfinedelaysetting1(),
            .outputfinedelaysetting2(),
            .outputonlydelaysetting2(),
            .outputonlyfinedelaysetting2(),
            .padtoinputregisterfinedelaysetting(),
            // synopsys translate_on
            .padtoinputregisterdelaysetting(dq_padtoinputregisterdelaysetting),
            .outputdelaysetting1           (dq_outputdelaysetting1),
            .outputdelaysetting2           (dq_outputdelaysetting2),
            .dataout                       (scan_dout)
        );
    end

and

// IO_CONFIG - num_dq 0->16
stratixiii_io_config dq_io_config(
    .datain(scan_din),          // shared per DQS group
    .clk(sc_clk),
    .ena(scan_enable),
    .update(scan_update),       // shared per DQS group
    // synopsys translate_off
    .devclrn(), .devpor(),
    .dutycycledelaymode(),
    .dutycycledelaysettings(),
    .outputfinedelaysetting1(),
    .outputfinedelaysetting2(),
    .outputonlydelaysetting2(),
    .outputonlyfinedelaysetting2(),
    .padtoinputregisterfinedelaysetting(),
    // synopsys translate_on
    .padtoinputregisterdelaysetting(),
    .outputdelaysetting1(dq_outputdelaysetting1),
    .outputdelaysetting2(dq_outputdelaysetting2),
    .dataout(scan_dout)
);

So it's pretty clear that one .padtoinputregisterdelaysetting port is connected and the other one isn't, but when I try to disconnect the connected one, the error doesn't go away.

Any help on this? Thanks in advance!