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KBloo3's avatar
KBloo3
Icon for New Contributor rankNew Contributor
4 years ago

AS & JTAG configuration issue on custom made CycloneIV EP4CE6F17C7N board

Hi all, I hade this issue up in the Intel support earlier this summer, but I had some weeks of holiday and when I got back the thread was closed and I was directed to this place. Could someone pl...
Farabi_Altera's avatar
Farabi_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hello Kenneth,

I will takeover Aiman's case to answer you.

regarding nSTATUS pullup, from Cyclone IV schematic review worksheet,

link: https://www.intel.com/content/dam/altera-www/global/en_US/others/download/board-layout-test/schematic-review-ws/worksheets/cyclone_10_lp_schematic_review_worksheet.doc

nSTATUS is required to pullup to VCC via 10kOhm resistor(external). This is to make sure the nSTATUS turns logic HIGH when configuration completed and to make sure its stable.

regarding VCCIO, same document, VCCIO[1..8] need to be powered up. This is the requirements to make sure the device functions as expected.

regards,

Farabi