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Altera_Forum
Honored Contributor
11 years agoarriaII GX LVDS clock input and 1.8V IO
I have two questions. (1) LVDS clock input I am planning to use EP2AGX65DF29C4. I set VCCIO=2.5V,VCCPD=2.5V in BANK3A. CLK6,4 input LVDS clock. (This is consulting the circuit of...
Altera_Forum
Honored Contributor
10 years agoYes, that all appears to be possible.
Again, as I said before - and as I did before - put together a small project and test the settings you want. That's what I did and that gave me the answer... Cheers, Alex