Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

arriaII GX LVDS clock input and 1.8V IO

I have two questions. (1) LVDS clock input I am planning to use EP2AGX65DF29C4. I set VCCIO=2.5V,VCCPD=2.5V in BANK3A. CLK6,4 input LVDS clock. （This is consulting the circuit of...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

1) Yes, you can drive LVDS signal pairs into I/O banks powered at 1.8V. (VCCPD=2.5V as you pointed out).

2) Yes, those voltage settings are correct.

Can I suggest that you (as I did to confirm these answers) use Quartus to help you? Put a small design together, make the pin location assignments and signal types that you want and run it through the tools. Quartus will quickly tell you if you're trying something your target device doesn't support.

Cheers,

Alex