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Altera_Forum
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10 years ago

Arria V SoC HPS EMAC 1588 PTP Feature

I want to use the Arria V SoC HPS EMAC 1588 PTP features, and to connect the EMAC PTP signals (f2h_emac_ptp_ref_clk, ptp_pps_o, ptp_aux_ts_trig_i) to the FPGA logic. I have a working design tha...
Altera_Forum's avatar
Altera_Forum
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8 years ago

By hand-editing soc_system.qsys t

<parameter name="EMAC0_PTP" value="true" />

the checkbox is grayed-out, but checked. If the Peripheral Pins->EMAC0 pin: is set to FPGA, hps_0.emac_ptp_ref_clock becomes visible. Unfortunately, so do hps_0.emac_rx_clk_in and hps_0.emac_tx_clk_in, and some others, too. It isn't clear just how to deal with these signals, which appear to be required by Qsys, even though they aren't physically required.

How do I deal with these signals to maintain the same Ethernet behavior as before, with a visible ptp_ref_clk?