Arria V GX - Clock problem

Hello!

I just started with the Altera FPGAs and Quartus II, I am learning but I haven´t could do work my first sequential example. I have tried a combinational design (a switch with a led) and it work perfectly. In contrast, in the sequential design I can´t make the clock CLK work. I have correctly defined the pin assigment but I don´t know if I have forbidden something about this assigment, I attached a picture with the assignment and the sequential example it is a blinking led. The VHDL code it is very easy and short:

library IEEE;

use IEEE.NUMERIC_STD.all;

use IEEE.STD_LOGIC_1164.all;

entity BLINKING is

port(CLK, RST: in STD_LOGIC;

LED: out STD_LOGIC);

end BLINKING;

architecture FUNCIONAL of BLINKING is

constant c_fin: natural := 50000000;

signal CUENTA: natural range 0 to 2**26-1;

signal LEDi: STD_LOGIC;

begin

process(CLK, RST)

begin

if(RST='1')then

CUENTA <= 0;

LEDi <= '0';

elsif(CLK'EVENT and CLK = '1') then

if(CUENTA = c_fin - 1) then

CUENTA <= 0;

LEDi <= not LEDi;

else

CUENTA <= CUENTA + 1;

end if;

end if;

end process;

LED <= LEDi;

end FUNCIONAL;

I compile all the project and I only obtain one warning message, it say:

warning (15714): some pins have incomplete i/o assignments. refer to the i/o assignment warnings report for details

What other assignments should I make to theses pins? I have also created a file *.sdc with clock constraints, the content is as follow:

create_clock -name (clk) -period 20.000 -waveform { 0.000 10.000 } [get_ports {clk}]

I am working with the development board Arria V GX starter kit, and the clock that I am using is the CLKIN_50_BOT that has a frequency of 50MHz that connects to the AP29 pin. Can someone tell me what I need to make my blinking led example work?

Thank you for all and best regards :)