KSMarkNew Contributor3 years agoArria V Avalon-MM Hard IP for PCIe PLL lock Is there a pin from the Avalon-MM Arria V Hard IP for PCI Experess that I can monitor the serdes_pll_locked signal or someother downstream signal I can infer the pll lock state. I am getting an occa...Show More
FarabiRegular Contributor3 years agoattached is userguideArria V Hard IP for PCI Express User Guide - Altera.pdf13.1 MB
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