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Honored Contributor
Honored ContributorArria V 1.5v PCML Read
Hi, I would like to use signal tap to read the value on a number of 1.5v PCML pins, however, using signal tap to probe these pins causes an error stating that the pins must have a fanout of 1. ...
Altera_ForumHonored Contributor
Honored Contributor"1) What does FPGA fabric transciever interface width mean? Doesn't the transciever just interface with a pair of differential pins on the FPGA?
" The fabric - XCVR interface width is referring to the data width between the PCS of XCVR and the core fabric. A transceiver's transmitter primary usage is to convert parallel data into serial data and transmit out on a differential pair. For the receiver, the process is the other way round. Outside the FPGA, you are seeing a pair of pins but inside there are more data lines.
