SB_S
New Contributor
New ContributorArria 10 series has dedicated 3 CS for the flash devices.
What is the use case of 3 Chip select of the external flash device ?
Forum Discussion
YuanLi_S_Intel
Regular Contributor
Regular ContributorHi SB S,
The number of chip select available means that the device is capable to connect to the number of external flash devices. You may have different configuration file store in each flash devices so that your FPGA can be reprogrammed easily.
Regards,
YL
SB_SSo By default we connect CS_0 to the flash device. If we have 3 flash devices and if FPGA wants to fetch the configuration file from 2nd flash , how it asserts the CS_1 ?
- YuanLi_S_Intel
Hi SB S,
To enable the communication between FPGA and the 2nd flash devices, which is connected to CS_1, all you need to do is just driving the CS pin low. You may refer to Arria 10 handbook for more information about it.
Regards,
YL
- SB_S
In the above document it says , the FPGA tries to load the configuration file 3 times if it fails initially. Does this mean , it asserts the cs_0 first then if don't find a valid file ,assert the cs_1 , then cs_2 .. Is it so And if we have valid configuration file in all the flash devices and if i need to select the second flash , how can user pull the CS_1 ? It has to be from FPGA right ?
- SB_S
Hi can you please reply for this query ?
