Arria 10 Native Transceiver Phy

Hi,

For your information, I have managed to have discussion with peers and search into internal database. As I understand it, the FIFO is able to handle data cross clock domain. This is why we are seeing the read and write side clocks are of different frequencies. However, the existing figure note of compensation mode for the FIFO seems to be confusing. I have filed a case to Factory to look into the confusing note and update the note and figure to avoid future customer confusion. Sorry for the inconvenience.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin