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Ok, thanks!
I managed to find out the theoretical max multiplier speed (635MHz for the fastest speed class Arria 10), it was in the data sheet, doh!
So definitely 730 MHz is out, however, rearranging a few things I think I could live with 575 MHz so at least theoretically this is not impossible.
I guess there is nothing to do but write some Verilog and see.
wbr Kusti
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635MHz looks too unrealistic. May be it is defined from mult block perspective with no logic across fabric and pins.
Remember those blocks such as mults are in fact small islands of ASIC to be connected to fabric. While asic blocks can be very fast but fabric cannot cope with.