Arria 10 M20k block usage- More block with less memory bits?

Thanks for your feedback, here are some reasoning behind:

On the larger FPGA, Quartus has more total resources (ALMs + M20Ks) to distribute memory more flexibly.

On the smaller FPGA, it might prioritize M20Ks for timing, routing, or stability reasons, avoiding MLABs unless explicitly forced.

Different Default "Auto" Settings Per Device

Quartus may have different default optimization strategies for different device sizes.

Some device families default to MLAB for small FIFOs, while others default to M20K, even when set to "Auto".

MLAB Timing Constraints in Smaller FPGA

If Quartus predicted MLAB timing to be worse on the smaller FPGA, it may have avoided them unless explicitly forced.

The smaller FPGA may have different routing congestion issues that caused Quartus to prefer M20Ks.

Platform Designer Defaults Might Differ Per Target Device

The Platform Designer's "Auto" setting may not be purely a Quartus decision—it could be pre-optimized per FPGA family.

The larger FPGA might default to "best-fit" (MLAB + M20K mix), while the smaller FPGA defaults to "safe-fit" (M20K only).