Arria 10 GX: 64 bit atomic access to Avalon Bus through PCIe?

Hi,

If you just want to use PCIe IP that interact with memory directly, then pls consider checking out below example design that use (PCIe) only, no DMA

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-a10-pcie-avmm.pdf
• This is the example design that you can generate from PCIe IP directly
• This example design currently connect to on chip RAM but you can replaced with DDR4 if you want

Regards,

Wei Chuan