New Contributor
New ContributorHi,
>> "... please check if you can see PCIe after a host warm reboot. "
The card is still not visible.
>> QSF
See attached file, I needed to change the file name from QSF to RTF because of this error:
The file type (.qsf) is not supported. Valid file types are: 7z, ai, bmp, bz2, c, cdr, cpp, css, csv, cxx, dib, dmp, doc, docx, eml, f, f90, for, gif, gz, gzip, h, i, ico, icproj, img, jfif, jpe, jpeg, jpg, log, mdb, mdl, mov, mp4, odp, ods, odt, pdf, pjpeg, png, pps, ppsx, ppt, pptx, psd, qar, rar, rtf, rtx, sel, sig, sln, tar, tbz2, tgz, tif, tiff, txt, txz, v, vcproj, vcxproj, vfproj, vhd, vtt, wks, xcf, xls, xlsx, xml, xz, zip, 3g2, dmg, mp3, msi, mts, m2ts, ogg, srt, tar.gz, tar.gz.sig, tar.xz, p4, p4pp.
ContributorThanks for the files.
Please refer to XCVR guide 1. Arria® 10 Transceiver PHY Overview
Your PCIe rx/tx pins are using bank 1C and 1D therefore you should use either PIN_AB28 or PIN_AD28 as PCIe refclk. Current PIN_Y28 can work as PCIe refclk only when PIN_AB28 and PIN_AD28 are not used.
Regards,
Rong
New ContributorHi. I have another question regarding the connection of reference clocks for the transceiver banks. I checked Arria® 10 Transceiver PHY Overview and Arria® 10 and Cyclone® 10 GX Avalon® Memory-Mapped (AvalonMM) Interface for PCI Express* User Guide and I can't find information on how to connect PCIe reference clock. Can you point me to the manual chapter or page number where can I find this info?
From your reply, I can make the following conclusion: Use REFCLK....CHB if first GXBL channels are used (as we have PCIe lanes 2 and 3 on bank 1D channels 0 and 1) or use REFCLK...CHT where the last two channels are used (as we have PCIe lanes 0 and 1 on bank 1C channels 4 and 5).
Kind regards, Marko
